Back-End, CMOS-Compatible Ferroelectric FinFET for Synaptic Weights

Building Artificial Neural Network accelerators by implementing the vector-matrix multiplication in analog domain relies on development of non-volatile and tunable resistances. In this work, we describe nanofabrication a three-dimensional HZO—WO x Fin Ferroelectric Field Effect Transistor (FinFeFET) with back-end-of-line conditions. The metal-oxide channel (WO ) is structured into fins engineered such that: 1) current-voltage characteristic linear (Ohmic conduction) 2) carrier density small enough that screening length comparable to one dimension device. process temperature, including HZO crystallization, does not exceed 400°C. Resistive switching demonstrated FinFeFET devices as 10 nm wide 200 long. Devices containing single fin are characterized: 5 µs long voltage pulses range (?5.5 V) applied gate, resulting symmetric term potentiation depression linearity coefficients 1.2 ?2.5.